Through AI optimization of the substrate cutting process (30% increase in wafer utilization rate of 30%) and large-scale extension molding technology, SIC wafer cost is 25% lower than that of international brands, and the price of ceramic carrier plate is only 1 / 3 that of the traditional platinum electrode solution. At the same time, the design of high thermal conductivity substrate can reduce the input of heat dissipation module and improve the comprehensive energy efficiency by 20%.
The DE-CW-1310 DFB EPI wafer, a high-performance epitaxial structure designed for distributed feedback (DFB) lasers operating at 1310 nm....
Ceramic thin-filmvacuum sensor Optical gas massflowmeter Liquid mass flowmeter Force sensor MEMS...
Photoelectric sensing chip Light source chips Optical transmission and modulationchips Optical detection and receptionchips...
Using a“Detach Core”which has two-layers carrier foil structure on the surface as a core, and forming...
Tenting process is a kind of subtractive process, the process as follows: Laminating photosensitive film...
Modified Semi-Added Process abbreviated as mSAP, which can be used on the core or build-up layers, pattern...
Semi-Added Process abbreviated as SAP, using on the build-up-layer pattern forming as follow：First depositing...
The product generally adopts the pressing lamination process of semi-curing sheets , and line formation...
The products generally adopt the Build-up Film Lamination process, and the circuit formation uses the...
Equipment features: 1. Non-destructive precision testing Micrometer-level probe contact technology...
